This invention relates to an AC motor control apparatus in which the current loop of an AC motor such as an induction motor is in digital form.
The recent spread of microcomputers has made it possible to substitute a microcomputer for a variety of discrete circuits. This holds for the control circuit of an AC motor, particularly the velocity control loop of which has already been placed under the control of a microcomputer.
FIG. 1 is a block diagram of a conventional AC motor control circuit. In FIG. 1, numeral 1 denotes a three-phase AC motor such as one for rotating the spindle of a machine tool. Numeral 2 denotes a pulse generator for producing velocity pulses TSA in dependence upon the rotation of the AC motor 1. Numeral 3 designates an arithmetic unit comprising a computer and which is part of a control section for the motor 1. The arithmetic unit 3 senses the actual velocity RV of the AC motor 1 on the basis of the velocity pulses TSA from the pulse generator, and produces an amplitude command Id as well as U- and V-phase phase commands .theta.ud, .theta.vd in dependence upon the difference between the actual velocity and a commanded velocity CV. The arithmetic unit 3 is composed of a processor 30 for performing processing, a program memory 31 storing a control program, a data memory 32 for storing various data, input/output ports 33, 34, a counter 35, and an address/data bus 36 interconnecting these components. The processor 30, in accordance with the control program in the program memory 31, reads via the bus 36 a value recorded in the counter 35, which counts the velocity pulses TSA, obtains the actual velocity RV of the AC motor 1 from the difference between the read value and the previously read value the processor 30 then, calculates the amplitude command Id on the basis of the difference between the actual velocity and the commanded velocity CV issued by an external unit, and applies the amplitude command to the input/output port 33 through the bus 36. Further, in accordance with the control program, the processor 30 retrieves a phase conversion table in the data memory 32 on the basis of the value from the counter 35, reads the corresponding U- and V-phase phase commands .theta.ud and .theta.vd, respectively, and applies these commands to the input/output port 34 via the bus 36. In order to deliver current commands Iud, Ivd in the form of U- and V-phase sinusoidal signals to which motor excitation frequency wt has been applied, the phase conversion table is stored digitally in the form of numerical values representing each of the crest or peak values of the sinusoidal signals.
Numeral 4a denotes a digital/analog converter (DA circuit) for converting the digital amplitude command Id into an analog amplitude command Is. Numerals 4b, 4c denote multiplying-type digital/analog conversion circuits for converting the respective U- and V-phase current commands Iud, Ivd into analog quantities and for multiplying these analog quantities by the analog amplitude command Is to produce analog U- and V-phase current commands Iu, Iv, respectively. Numeral 5 designates a W-phase current forming circuit for forming a W-phase current command Iw from the analog U- and V-phase current commands Iu, Iv. Numeral 6 represents an operational amplifier for obtaining the difference between actual phase currents and the commanded currents Iu, Iv, Iw in the respective phases. The operational amplifier 6 is composed of an operational amplifier for calculating the difference between the commanded currents Iu, Iv, Iw in the respective phases, and the actual phase currents Iau, Iav, Iaw, respectively, and an arithmetic unit 10 for producing a W-phase phase current Iaw by adding Iav and Iau, which are sensed by current transformers 9r, 9s. Numeral 7 denotes a pulse-width modulating circuit, and numeral 8 an inverter controlled by an output signal from the pulse-width modulating circuit for providing a DC voltage derived from an externally provided three-phase AC power supply and a rectifying circuit (a group of diodes and a capacitor) for rectifying the three-phase alternating current into a direct current. As shown in FIG. 2, the pulse-width modulating circuit 7 includes a sawtooth waveform generating circuit STSG for generating a sawtooth waveform STS, comparators COMu, COMv, COMw, NOT gates NOT.sub.1 through NOT.sub.3, and drivers DV.sub.1 through DV.sub.6. The inverter 8 includes six power transistors Q1 through Q6 and six diodes D1 through D6. The comparators COMu, COMv, COMw of the pulse-width modulating circuit 7 compare the sawtooth signal STS with the amplitudes of the three-phase AC signals iu, iv, iw, respectively, and produce a "1" output when the magnitude of STS is exceeded by iu, iv or iw, or a "0" output when the magnitude of STS is greater. Thus, with respect to iu, the comparator COMu produces the current command iuc shown in FIG. 3. More specifically, pulse-width modulated three-phase current commands iuc, ivc, iwc dependent upon the amplitudes of iu, iv, iw are produced. These current commands iuc, ivc, iws are then converted into drive signals SQ1 through SQ6 by the NOT gates NOT.sub.1 through NOT.sub.3 and drivers DV.sub.1 through DV.sub.6, whereby the on/off, action of the power transistors Q1 through Q6 of the inverter 8 is controlled. Numeral 8' denotes a rectifying circuit for the above-mentioned direct current feed.
Next, the operation of the arrangement shown in FIG. 1 will be described for a case where the AC motor 1 is rotating at the actual velocity RV. The processor 30 of the arithmetic unit 3 reads the value in the counter 35, which counts the velocity or rotational pulses TSA, through the bus 36 to sense the actual velocity RV of the AC motor 1. Next, the processor 30 calculates the amplitude command Id on the basis of the difference between the commanded velocity CV and the sensed actual velocity, retrieves the phase conversion table from the memory 32, reads out the corresponding U- and V-phase current commands Iud, Ivd and, via the bus 36, applies the amplitude Id to the input/output port circuit 33 and the U- and V-phase current commands Iud, Ivd to the input/output port circuit 34. The amplitude command Id from the input/output port 33 is converted into an analog amplitude command Is by the digital/analog conversion circuit 4a, which command is then applied to the multiplying-type digital/analog conversion circuits 4b, 4c. Meanwhile, the U- and V-phase current commands Iud, Ivd are converted into analog quantities by the respective multiplying-type digital/analog conversion circuits 4b, 4c, which quantities are multiplied by the analog amplitude command Is to be converted into analog U- and V-phase current commands Iu, Iv. The U- and V-phase current commands Iu, Iv are applied to the W-phase current forming circuit 5, which produces the W-phase current Iw. The W-phase current Iw is applied to the operational amplifier 6 together with the U- and V-phase current commands Iu, Iv, respectively. The operational amplifier 6 receives the actual phase currents Iau, Iav from the converters 9r, 9s and forms the W-phase phase current Iaw. The operational amplifier 6 also produces three-phase AC signals iu, iv, iw, which are the differences between the three-phase current commands Iu, Iv, Iw and respective ones of the actual phase currents Iau, Iav, Iaw. The three-phase AC signals Iu, iv, iw indicative of these differences are applied to the respective comparators COMu, COMv, COMw of the pulse-width modulating circuit 7. The comparators COMu, COMv, COMw compare the amplitudes of the three-phase AC signals iu, iv, iw with the amplitude of the sawtooth STS, and deliver as outputs three-phase current commands iuc, ivc, iwc produced by way of pulse width modulation. The outputs from the comparators are supplied to the NOT gates NOT.sub.1 through NOT.sub.3 and to the drivers DV.sub.1 through DV.sub.6, which generate the inverter drive signals SQ1 through SQ6. The inverter drive signals SQ1 through SQ6 are applied to the bases of the power transistors Q1 through Q6, respectively, in the inverter 8, and control the on/off action of the power transistors Q1 through Q6 for supplying three-phase current to the AC motor 1. The AC motor 1 will thenceforth be controlled in a similar mode until the motor eventually rotates at the commanded velocity.
With the AC motor control apparatus having this conventional construction, the current loop requires a quick response. Therefore, the DA conversion circuits 4a through 4c, the operational amplifier 6 and the pulse-width modulating circuit 7, which are the current loop, inevitably are composed of discrete circuits and are difficult to convert into digital form. As a consequence, the apparatus includes a large number of component parts and is possessed of complicated circuitry.
Moreover, due to the storage time of the power transistors Q1 through Q6 in the inverter 8, there is the danger that the upper and lower sides of the inverter will be short-circuited by the upper transistor Q1 and lower transistor Q2 turning on simultaneously. Accordingly, it is necessary that the drive signals SQ1, SQ2 be provided with a dead zone. This is difficult to achieve in digital fashion.
In addition, less current ripple is produced if the pulse-width modulating circuit compares triangular waves rather than sawtooth waveforms. The fact that the triangular wave comparison must be realized digitally further complicates the digitalization of the apparatus.